Electronic circuit

ABSTRACT

In an electronic circuit of a current switch construction in which the emitters of a first transistor and a second transistor are commonly connected to a constant-current supply, and a load resistor is connected to the collector of the first transistor, thereby to take out an output from the collector, the improvement being a pnp-type transistor, in which temporarily flows an electric current to a collector circuit of the first transistor when it is rendered non-conductive, which is inserted in a collector circuit of the second transistor.

FIELD OF THE INVENTION

The present invention is concerned with an electronic circuit. Morespecifically, the invention is concerned with an electronic circuit of acurrent switch construction which has improved delay in operation orwhich features improved rising characteristics in the output voltage.

BACKGROUND OF THE INVENTION

A current switch is usually so constructed that emitters of a firsttransistor and a second transistor are commonly connected to aconstant-current supply, and a load resistor is connected between thecollector of at least one of the two transistors and the power supply,so that the above-mentioned collector serves as an output terminal. Aninput voltage is applied to the base of the first transistor, and areference voltage (or often another input voltage) is applied to thebase of the second transistor. With the thus constructed circuit, whenthe level of the input voltage changes so as to be higher or lower thanthe level of the reference voltage, one of the transistors is renderednon-conductive and the other one is rendered conductive. However, withthe conventional construction of bipolar transistors the collectoroccupies larger areas than the emitter and establishes a large capacitywith respect to the substrate. Thus, the capacity and the load resistordefine a time constant which determines the rising speed of thecollector potential. Accordingly, the rising speed of the output voltagefrom the low level to this high level is determined by the timeconstant. The collector potential is quickly broken from a high level toa low level when the first transistor is rendered conductive accordingto a small time constant determined by a small resistance while thetransistor is conductive and has a capacity Cc. In order to increase therising speed of the output voltage, it has heretofore been attempted toreduce the load resistance R₁. According to this method, however,increase in the current is not avoidable when it is desired to take outthe same logic amplitude as before.

OBJECTS AND SUMMARY OF THE INVENTION

The object of the present invention is to provide an electronic circuitof a current switch construction having improved rising characteristicsin the output voltage.

Another object of the present invention is to provide a current switchwhich operates at an increased speed as a result of the improvement inthe rising characteristics of output voltage from a low level to a highlevel, which is accomplished by utilizing a current of a secondtransistor.

According to the present invention, there is provided an electroniccircuit of a current switch construction in which the emitters of afirst transistor and a second transistor are commonly connected to aconstant-current supply, and a load resistor is connected to thecollector of the first transistor thereby to take out the output fromthe collector, wherein a pnp-type transistor in which an electriccurrent temporarily flows to a collector circuit of the first transistorwhen it is rendered non-conductive, is inserted in a collector circuitof the second transistor.

Further features and advantages of the present invention will becomeapparent from the ensuing description with reference to the accompanyingdrawings to which, however, the scope of the invention is in no waylimited.

BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1 is a circuit diagram illustrating a conventional current switch;

FIGS. 2A and 2B are circuit diagrams of current switches according to anembodiment of the present invention;

FIG. 3 is a plan view showing patterns of the current switch of FIG. 2A;

FIGS. 4A, 4B and 4C are circuit diagrams of current switches accordingto another embodiment of the present invention;

FIG. 5 is a cross-sectional view illustrating the construction of majorportions of the current switch of FIG. 4A;

FIGS. 6A and 6B are circuit diagrams of current switches according to afurther embodiment of the present invention; and

FIG. 7 is a circuit diagram of current switch according to a stillfurther embodiment of the present invention;

FIG. 8 illustrates an example in which the circuit of the presentinvention is applied to an address decoder of a memory.

DESCRIPTION OF THE PREFERRED EMBODIMENTS

Referring to a current switch shown in FIG. 1, emitters of npn-typetransistors T₁, T₂ are commonly connected to a constant-current supplyI₁, and a load resistor R₁ is connected between the collector of thetransistor T₁ and a power supply line E₁, so that the collector servesas an output terminal. An input voltage V_(i) is applied to the base ofthe transistor T₁, and a reference voltage V_(ref) (or often anotherinput voltage) is applied to the base of the transistor T₂. When onlyone output is required, i.e., when the inverted output is only required,no load resistor is connected to the collector of the second transistorT₂, as shown in FIG. 1. In other words, the collector of the secondtransistor T₂ in many cases is directly connected to the power supplyline E₁. The current switch operates in a customary manner. Namely, whenthe input voltage V_(i) changes into a high level or a low level withrespect to the reference voltage V_(ref), the transistor T₁ is renderedconductive or non-conductive, and the transistor T₂ is renderednon-conductive or conductive in an opposite manner to the transistor T₁.However, with the conventional construction of bipolar transistors thecollector occupies larger areas than the emitter or the like andestablishes a large capacity Cc relative to the substrate. The capacityCc and the load resistor R₁ define a time constant which determines therising speed of the collector potential. Accordingly, the rising speedof the output voltage V_(O) from the low level to the high level isdetermined by this time constant. The collector potential is quicklybroken from the high level to the low level when the transistor T₁ isrendered conductive according to a small time constant determined by asmall resistance and the capacity Cc while the transistor T₁ isconductive. In order to increase the rising speed of the output voltageV_(O), it has heretofore been attempted to reduce the load resistanceR₁. According to this method, however, an increase in the current is notavoidable when it is desired to take out the same logic amplitude asbefore.

The present invention is to provide a current switch which operates athigh speeds by improving the rising characteristics in the outputvoltage from the low level to the high level utilizing by a current onthe side of the transistor T₂. When the output voltage V_(O) rises, thetransistor T₂ on the reference side is rendered conductive whichwastefully flows an electric current into the substrate. According tothe present invention, however, it is contemplated to effectivelyutilize the electric current. Namely, the electric current is introducedto the collector of the transistor T₁ to electrically charge thecollector capacity Cc of the transistor T₁. Consequently, the capacityCc is electrically charged more quickly, enabling the output voltageV_(O) to be quickly raised. The circuit of the invention is illustratedbelow in detail with reference to the following embodiments.

FIG. 2A illustrates an embodiment of the present invention. According tothe circuit of FIG. 2A, an emitter-base path of a pnp-type transistorT₁₃ is inserted between the collector of a transistor T₁₂ and a powersupply line E₁, and the collector of the transistor T₁₃ is connected tothis collector of a transistor T₁₁. The circuit setup with regard toother respects is the same as that of FIG. 1. In FIG. 2A, symbol E₂denotes a power supply line of the negative polarity.

Operation of the circuit is illustrated below. When an input voltageV_(i) is a level greater than that of the reference voltage V_(ref), thetransistor T₁₁ is rendered conductive and the transistor T₁₂non-conductive, and when the input voltage V_(i) is a level smaller thanthat of the reference voltage V_(ref), the transistor T₁₁ is renderednon-conductive and the transistor T₁₂ conductive, in the same manner asthe circuit of FIG. 1. However, when the transistor T₁₁ is renderednon-conductive, i.e., when the output voltage V_(O) rises, thetransistor T₁₂ is rendered conductive, so that an electric current isallowed to flow into the transistor T₁₂ through the emitter-base path ofthe transistor T₁₃. The transistor T₁₃ therefore is rendered conductive,and a collector current is permitted to flow into the collector of thetransistor T₁₁ which is rising. This helps to electrically charge thecollector capacity of the transistor T₁₁. Therefore, the collectorcapacity is quickly charged, being assisted by the electric currentwhich is introduced through the load resistor R₁₁, whereby the collectorpotential or, in other words, an output voltage is quickly raised to thehigh level.

According to the circuit shown in FIG. 2A, not only the electric chargestored in the collector capacity of the transistor T₁₁, but also theelectric charge stored in the collector capacity of the transistor T₁₃,must be discharged when the transistor T₁₁ is rendered conductive, i.e.,when the output voltage V_(O) is broken from the high level to the lowlevel. However, the resistance of the transistor T₁₁ while it isconductive is so small that the discharge is quickly effected and thebreak of the output voltage is not delayed very much.

FIG. 2B illustrates a circuit which is capable of producing only anon-inverted output relative to the input voltage V_(i). In this case, aload resistor R_(11a) is connected between the transistor T₁₂ and thepower supply E₁, an emitter-base path of a pnp-type transistor T_(13a)is connected between the collector of the transistor T₁₁ and the powersupply line E₁, and the collector of the transistor T_(13a) is connectedto the collector of the transistor T₁₂. This circuit setup with regardto other respects is the same as that of FIG. 2A. This circuit alsooperates in the same manner as the circuit of FIG. 2A.

FIG. 3 is a plan view illustrating a pattern of the circuit of FIG. 2A,in which reference numerals 11e, 11b and 11c denote the emitter, baseand collector of the transistor T₁₁, respectively, reference numerals12e, 12b and 12c denote the emitter, base and collector of thetransistor T₁₂, respectively, and 13e, 13b and 13c denote the emitter,base and collector of the transistor T₁₃, respectively. Referencenumerals 13c and 14 denote a p⁺ -type collector region and a diffusionresistance layer which are formed by being diffused in the base region13b. According to this setup, the transistor T₁₃ is constituted amongthe p⁺ -type collector region, the n-type layer 13b and the p⁺ -typeemitter layer (lying on the n-type layer 13b) which is notdiagramatized. As the transistor T₁₃ of the type of distributionconstant and the resistor R₁₁ are commonly formed among the diffusionlayer 14, the circuit of this pattern can be constructed in a small sizewithout requiring wirings.

By the addition of the pnp-type transistor T₁₃ as shown in FIGS. 2A and2B, the rising characteristics of the output voltage V_(O) or V_(O) canbe improved without the need of decreasing the load resistance R₁₁. Withregard to the breaking characteristics of the output voltage V_(O),however, there still remains room for improvement. Namely, when thetransistor T₁₁ is rendered conductive so that the output voltage V_(O)breaks from the high level to the low level, it is necessary todischarge not only the electric charge stored in the collector capacityof the transistor T₁₁, but also to discharge the electric charge storedin the collector capacity of the transistor T₁₃. Since the transistorT₁₁ in itself has a small resistance while it is conductive, it can beeasily understood that the discharge is carried out quickly. Under asteady state in which the transistor T₁₁ is non-conductive and thetransistor T₁₂ is conductive, however, the potential between theresistor R₁₁ and a connection point between the transistors T₁₁ and T₁₃rises to nearly zero volt (E₁ is assumed to be 0 volt). On the otherhand, the base potential of the transistor T₁₃ is a value which is lowerthan the zero potential by a value dropped through the pn junctionacross the emitter and the base. In other words, the base potential ofthe transistor T₁₃ is a value of about -0.8 volt. Consequently, aforward biasing voltage is applied across the collector and the base, sothat the transistor T₁₃ is saturated. Accordingly, a large amount ofelectric charge is accumulated in the junction capacity between thecollector and the base of the transistor T₁₃ ; thus extended periods oftime are required to discharge the accumulated electric charge. Ineffect, the break of the output voltage V_(O) tends to be delayed.

In order to eliminate the above-mentioned defect, the present inventionprovides a current switch in which the collector potential of thepnp-type transistor T₁₃ is clamped, so that it operates in anunsaturated region in an attempt to reduce the collector capacity and toimprove the breaking characteristics. This second embodiment of thepresent invention is illustrated below

FIG. 4A illustrates an embodiment of the present invention employing aSchottky barrier diode SBD as a clamping diode. According to thisembodiment, the diode SBD is connected in the forward direction betweenthe collector and the base of the transistor T₁₃. The setup with respectto other points is the same as that of FIG. 2A. When the transistor T₁₂is rendered conductive by the input V_(i) of the low level, the basepotential of the transistor T₁₃ is -0.8 volt, as mentioned earlier. Inthis case, the transistor T₁₁ remains non-conductive. However, theprovision of the diode SBD permits a portion of a constant current I₁₁to flow through a path of E₁ -R₁₁ -SBD-T₁₂, while base currents of thetransistor T₁₃ flow in parallel therewith. Therefore, the potential atthe point A decreases below 0 volt due to the electric current whichflows through the resistor R₁₁ ; the potential, however, is determinedby the diode SBD. For example, if the voltage drop through the diode SBDin the forward direction is 0.4 volt, the potential at the point A isclamped to -0.4 volt which is higher than the base potential of -0.8volt by 0.4 volt. With this constructed circuit, a voltage greater thanthe forward voltage (0.8 volt) is not applied across the collector andthe base of the transistor T₁₃ ; thus the transistor T₁₃ operates in anunsaturated region. Therefore, a small amount of electric charge isaccumulated in the collector capacity to improve the breakingcharacteristics. When the input V_(i) changes from the low level to thehigh level, the output rapidly breaks from the high level to the lowlevel (since the above-mentioned collector charge is quicklydischarged).

FIG. 4B illustrates another embodiment of the present inventionemploying an ordinary pn-junction diode D₁ as a clamping diode.According to this embodiment, a pn-junction diode D₁ is substituted forthe Schottky barrier diode SBD of FIG. 4A, and a shifting resistor R₁₂is inserted between the base of the transistor T₁₃ and the cathode(point B) of the diode D₁. The pn-junction diode D₁ has a forwardvoltage of 0.8 volt, like the voltage across the collector and the baseof the transistor T₁₃. When the pn-junction diode is used for thecircuit of FIG. 4A in place of the diode SBD, it is difficult to preventthe transistor T₁₃ from being saturated. When the potential at the pointB is lowered by inserting the resistor R₁₂ as shown in FIG. 4B, however,the potential at the point A is lowered correspondingly, making itpossible to prevent the transistor T₁₃ from being saturated. Forexample, if the voltage is dropped by 0.4 volt by the resistor R₁₂, thepotential at the point B becomes -1.2 volt which is lower by 0.4 voltthan -0.8 volt which is the base potential of the transistor T₁₃.Accordingly, even when the potential at the point A is clamped by thediode D₁ to -0.4 volt which is higher by 0.8 volt than the potential atthe point B, the same result is obtained as that of the circuit of FIG.4A.

FIG. 4C illustrates yet a further embodiment of the present invention inwhich a resistor R₁₃ is inserted between the point A and the diode SBDof FIG. 4A, to increase the amplitude of the output V_(O). When theoutput V_(O) is in the high level, i.e., when the transistor T₁₂ isconductive, an electric current flows through a path of E₁ -R₁₁ -R₁₃-SBD-T₁₂ so that the collector of the transistor T₁₃ is clamped to adesired potential due to the diode SBD. In this case, however, thepotential at the point A does not decrease to the collector potential ofthe transistor T₁₃ owing to the current which flows through the resistorR₁₃. Accordingly, the high level of the output V_(O) is maintained at ahigh value. The resistor R₁₃ for amplifying the amplitude can also beemployed for the circuit of FIG. 4B.

Generally, when the Schottky barrier diode is used as a clamping diode,the shifting resistor is not required, enabling the circuit setup to besimplified and having advantages from the standpoint of circuitconstruction. However, it is difficult to provide the diode SBD in thepnp-type transistor to clamp its collector potential relative to thebase potential. This, however, can be easily realized if the transistoris formed in a lateral construction. Namely, FIG. 5 illustrates theconstruction of elements in which the pnp-type transistor T₁₃ (shown inFIG. 4A) and the Schottky barrier diode SBD (shown in FIG. 4A) areformed in the same land, wherein reference numeral 21 denotes a p-typesilicon semiconductor substrate, 22 denotes an n-type layer which isformed on the surface of the substrate 21 and which serves as a baseregion, 23 and 24 denote a p-type emitter region and a p-type collectorregion, respectively, which are formed in the surface of the n-typelayer 22, 25 denotes regions for isolating the elements, 26 denotes asurface insulation layer, and 27E, 27C and 27B denote an emitter, acollector and a base, respectively, which are in ohmic contact with theregions 22, 23 and 24, and which constitute the pnp-type transitor T₁₃.With the constructed device, if the collector 27C is contacted to aportion of the n-type layer 22, there is established a Schottky barrierdiode SBD, so that the circuit becomes equivalent to that of FIG. 4A.

FIGS. 6A and 6B illustrate further embodiments according to the presentinvention, in which the outputs of the load resistors R₁₁ and R_(11a)are produced via emitter-follower transistors T₁₄ and T_(14a). Thepresent invention is also applicable to the circuits of FIGS. 6A and 6B,wherein symbols T₁₅ and T_(15a) denote transistors for improving therising characteristics of the output voltage.

FIG. 7 shows a circuit of the type of a binary output, which producesthe output voltage V_(O) from the collector of transistor T₂₂ of apolarity opposite to that of the output voltage V_(O) from the collectorof the transistor T₂₂. According to this circuit, the pnp-typetransistors are inserted on both sides to improve the risingcharacteristics of the two output voltages. Symbols T₂₃ and T₂₄ denotethe pnp-type transitors, and R₂₁ and R₂₂ denote the load resistors. Thecircuit of FIG. 7 operates in the same manner as the circuits of FIGS.2A and 2B. However, since the load resistors R₂₁ and R₂₂ are inserted inparallel with the emitter-base paths of the transistors T₂₃, T₂₄, theconstant current I₁₁ when the transistors T₂₁, T₂₂ are renderedconductive is supplied in the form of a sum of currents flowing throughthe load resistors R₂₁, R₂₂ and base currents of the transistors T₂₃,T₂₄.

Finally, mentioned below is an example of utilizing the circuit of thepresent invention. FIG. 8 illustrates an example in which the circuit ofthe present invention is applied to an address decoder of a memory.Referring to FIG. 8, an address input is fed to an address bufferconsisting of transistors T₃₁, T₃₂, and resistors R₃₁, R₃₂. The outputof the address buffer is fed to decoder lines 30-1 via level-shiftingtransistors T₃₃, T₃₄. The output of the decoder 30-1 is fed to a memorycell 31-1 via a word driver which is constructed in the form of acurrent switch according to the present invention and which is made upof transistors T₃₅₋₁, . . . T_(35-n), T₃₆, T₃₇ and a resistor R₃₃, andvia a transistor T₃₈ for driving the word line. The output is thenproduced to the word line.

According to the circuit of FIG. 8, the transistors T₃₅₋₁ . . . T_(35-n)employed in the circuit of the present invention constitute an outputstage for the address decoder. Namely, the output stage of the addressdecoder constitutes a current switch being made up of the transistor T₃₆to which will be applied a reference voltage and a plurality oftransistors which are connected in parallel and which will be servedwith address signal bits selected from those consisting of A₁, A₂, . . .A_(n) and A₁, A₂, . . . A_(n) which are of the inverted form. Here, theplurality of the transistors are represented by T₃₅₋₁ . . . T_(35-n). Inthe address decoder, when the signals selected from the signals A₁, A₂,. . . A_(n) are all of the low level, the transistors T₃₅₋₁ . . .T_(35-n) are all rendered non-conductive, whereby the output voltageV_(O) acquires the high level so that the word line becomes high level.However, the number of the transistors T₃₅₋₁ . . . T_(35-n) increaseswith the increase in the number n of the address signal bits, and thespeed at which the output voltage V_(O) acquires the high level becomesslow, i.e., the speed for selecting the word lines becomes slow.Therefore, a transistor T₃₇ is inserted in the circuit of the transistorT₃₆ to temporarily feed the collector current to the transistors T₃₅₋₁ .. . T_(35-n) in order to electrically charge the parasitic collectorcapacities of the transistors T₃₅₋₁ . . . T_(35-n). By so doing, thespeed for selecting the word lines can be increased.

According to the current switch of the present invention, as illustratedin detail in the foregoing, the collector capacity of a transistor whileit is non-conductive is electrically charged by a pnp-type transistorutilizing the operation of another transistor while it is conductive, inorder to improve the rising and breaking characteristics of the outputvoltage. Consequently, the circuit of the present invention can be veryeffectively employed for logic circuits, memory decoders, and the like.

I claim:
 1. In an electronic circuit of a current switch construction inwhich the emitters of a first transistor and a second transistor arecommonly connected to a constant-current supply, and a load resistor isconnected to the collector of the first transistor thereby to provide anoutput from the collector, the improvement being a third transistor inwhich temporarily flows an electric current to a collector circuit ofthe first transistor when it is rendered non-conductive, said thirdinserted transistor being in a collector circuit of the secondtransistor, a load resistor being connected between the collector ofsaid first transistor and a power supply, the base and emitter of saidthird transistor being connected between the collector of said secondtransistor and said power supply, the collector of said third transistorbeing connected to a connection point between the collector of saidfirst transistor and said load resistor, an input voltage being appliedto the base of said first transistor, a reference voltage being appliedto the base of said second transistor, and an output being provided fromthe collector of said first transistor, a Schottky barrier diode beingconnected across the base and the collector of said third transistor. 2.In an electronic circuit of a current switch construction in which theemitters of a first transistor and a second transistor are commonlyconnected to a constant-current supply, and a load resistor is connectedto the collector of the first transistor thereby to provide an outputfrom the collector, the improvement being a third transistor in whichtemporarily flows an electric current to a collector circuit of thefirst transistor when it is rendered non-conductive, said thirdtransistor being inserted in a collector circuit of the secondtransistor, a load resistor being connected between the collector ofsaid second transistor and the power supply, the base and emitter ofsaid third transistor being connected between the collector of saidfirst transistor and said power supply, the collector of said thirdtransistor being connected to a connection point between the collectorof said second transistor and said load resistor, an input voltage beingapplied to the base of said first transistor, a reference voltage beingapplied to the base of said second transistor, and an output beingprovided from the collector of said second transistor, a Schottkybarrier diode is connected across the base and the collector of saidthird transistor.
 3. An electronic circuit according to claim 1, whereina resistor is connected between the collector of said first transistorand a connection point which connects the collector of said thirdtransistor and said Schottky barrier diode.
 4. An electronic circuitaccording to claim 2, wherein a resistor is connected between thecollector of said second transistor and a connection point whichconnects the collector of said third transistor and said Schottkybarrier diode.
 5. In an electronic circuit of a current switchconstruction in which the emitters of a first transistor and a secondtransistor are commonly connected to a constant-current supply, and aload resistor is connected to the collector of the first transistorthereby to take out an output from the collector, the improvement beingat least a third transistor in which temporarily flows an electriccurrent to a collector circuit of the first transistor when it isrendered non-conductive, said third transistor being connected in acollector circuit of the second transistor, the collector circuit ofsaid second transistor consists of a load resistor connected between thecollector of said second transistor and the power supply, and a fourthtransistor of the type of an emitter follower of which the base isconnected to a connection point which connects said load resistor andsaid second transistor, of which the collector is connected to saidpower supply and of which the emitter serves as an output terminal, andwherein the base and emitter of said third transistor is connectedbetween the collector of said first transistor and said power supply,the collector of said third transistor is connected to the emitter ofsaid fourth transistor, an input voltage is applied to the base of saidfirst transistor, and an output is taken out from the emitter of saidfourth transistor.
 6. In an electronic circuit of a current switchconstruction in which the emitters of a first transistor and a secondtransistor are commonly connected to a constant-current supply, and aload resistor is connected to the collector of the first transistorthereby to take out an output from the collector, the improvement beingat least a third transistor in which temporarily flows an electriccurrent to a collector circuit of the first transistor when it isrendered non-conductive, said third transistor being connected in acollector circuit of the second transistor, said first transistorconsists of a group of transistors which are connected in parallel witheach other, a load resistor is connected between the collectors of saidgroup of transistors and said power supply, the base and emitter of saidthird transistor is connected between the collector of said secondtransistor and said power supply, the collector of said third transistoris connected to a connection point which connects the collectors of saidgroup of transistors and said load resistor, an input voltage is appliedto the bases of said group of transistors, a reference voltage isapplied to the base of said second transistor, and an output is takenout from the connection point which connects the collectors of saidgroup of transistors and said load resistor.